Xen Test Framework
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Macros | |
#define | X86_EFLAGS_CF 0x00000001 /* Carry Flag */ |
#define | X86_EFLAGS_MBS 0x00000002 /* Resvd bit */ |
#define | X86_EFLAGS_PF 0x00000004 /* Parity Flag */ |
#define | X86_EFLAGS_AF 0x00000010 /* Auxillary carry Flag */ |
#define | X86_EFLAGS_ZF 0x00000040 /* Zero Flag */ |
#define | X86_EFLAGS_SF 0x00000080 /* Sign Flag */ |
#define | X86_EFLAGS_TF 0x00000100 /* Trap Flag */ |
#define | X86_EFLAGS_IF 0x00000200 /* Interrupt Flag */ |
#define | X86_EFLAGS_DF 0x00000400 /* Direction Flag */ |
#define | X86_EFLAGS_OF 0x00000800 /* Overflow Flag */ |
#define | X86_EFLAGS_IOPL 0x00003000 /* IOPL mask */ |
#define | X86_EFLAGS_NT 0x00004000 /* Nested Task */ |
#define | X86_EFLAGS_RF 0x00010000 /* Resume Flag */ |
#define | X86_EFLAGS_VM 0x00020000 /* Virtual Mode */ |
#define | X86_EFLAGS_AC 0x00040000 /* Alignment Check */ |
#define | X86_EFLAGS_VIF 0x00080000 /* Virtual Interrupt Flag */ |
#define | X86_EFLAGS_VIP 0x00100000 /* Virtual Interrupt Pending */ |
#define | X86_EFLAGS_ID 0x00200000 /* CPUID detection flag */ |
#define | X86_CR0_PE 0x00000001 /* Enable Protected Mode (RW) */ |
#define | X86_CR0_MP 0x00000002 /* Monitor Coprocessor (RW) */ |
#define | X86_CR0_EM 0x00000004 /* Require FPU Emulation (RO) */ |
#define | X86_CR0_TS 0x00000008 /* Task Switched (RW) */ |
#define | X86_CR0_ET 0x00000010 /* Extension type (RO) */ |
#define | X86_CR0_NE 0x00000020 /* Numeric Error Reporting (RW) */ |
#define | X86_CR0_WP 0x00010000 /* Supervisor Write Protect (RW) */ |
#define | X86_CR0_AM 0x00040000 /* Alignment Checking (RW) */ |
#define | X86_CR0_NW 0x20000000 /* Not Write-Through (RW) */ |
#define | X86_CR0_CD 0x40000000 /* Cache Disable (RW) */ |
#define | X86_CR0_PG 0x80000000 /* Paging (RW) */ |
#define | X86_CR4_VME 0x00000001 /* VM86 extensions */ |
#define | X86_CR4_PVI 0x00000002 /* Virtual interrupts flag */ |
#define | X86_CR4_TSD 0x00000004 /* Disable time stamp at ipl 3 */ |
#define | X86_CR4_DE 0x00000008 /* Debugging extensions */ |
#define | X86_CR4_PSE 0x00000010 /* Page size extensions */ |
#define | X86_CR4_PAE 0x00000020 /* Physical address extensions */ |
#define | X86_CR4_MCE 0x00000040 /* Machine check */ |
#define | X86_CR4_PGE 0x00000080 /* Global pages */ |
#define | X86_CR4_PCE 0x00000100 /* Performance counters at ipl 3 */ |
#define | X86_CR4_OSFXSR 0x00000200 /* Fast FPU save and restore */ |
#define | X86_CR4_OSXMMEXCPT 0x00000400 /* Unmasked SSE exceptions */ |
#define | X86_CR4_UMIP 0x00000800 /* UMIP */ |
#define | X86_CR4_VMXE 0x00002000 /* VMX */ |
#define | X86_CR4_SMXE 0x00004000 /* SMX */ |
#define | X86_CR4_FSGSBASE 0x00010000 /* {rd,wr}{fs,gs}base */ |
#define | X86_CR4_PCIDE 0x00020000 /* PCID */ |
#define | X86_CR4_OSXSAVE 0x00040000 /* XSAVE/XRSTOR */ |
#define | X86_CR4_SMEP 0x00100000 /* SMEP */ |
#define | X86_CR4_SMAP 0x00200000 /* SMAP */ |
#define | _XSTATE_FP 0 |
#define | XSTATE_FP (1ULL << _XSTATE_FP) |
#define | _XSTATE_SSE 1 |
#define | XSTATE_SSE (1ULL << _XSTATE_SSE) |
#define | _XSTATE_YMM 2 |
#define | XSTATE_YMM (1ULL << _XSTATE_YMM) |
#define | _XSTATE_BNDREGS 3 |
#define | XSTATE_BNDREGS (1ULL << _XSTATE_BNDREGS) |
#define | _XSTATE_BNDCSR 4 |
#define | XSTATE_BNDCSR (1ULL << _XSTATE_BNDCSR) |
#define | _XSTATE_OPMASK 5 |
#define | XSTATE_OPMASK (1ULL << _XSTATE_OPMASK) |
#define | _XSTATE_ZMM 6 |
#define | XSTATE_ZMM (1ULL << _XSTATE_ZMM) |
#define | _XSTATE_HI_ZMM 7 |
#define | XSTATE_HI_ZMM (1ULL << _XSTATE_HI_ZMM) |
#define | _XSTATE_PKRU 9 |
#define | XSTATE_PKRU (1ULL << _XSTATE_PKRU) |
#define | _XSTATE_LWP 62 |
#define | XSTATE_LWP (1ULL << _XSTATE_LWP) |
#define | X86_MXCSR_IE 0x00000001 /* Invalid-Operation Exception */ |
#define | X86_MXCSR_DE 0x00000002 /* Denormal-Operation Exception */ |
#define | X86_MXCSR_ZE 0x00000004 /* Zero-divide Exception */ |
#define | X86_MXCSR_OE 0x00000008 /* Overflow Exception */ |
#define | X86_MXCSR_UE 0x00000010 /* Underflow Exception */ |
#define | X86_MXCSR_PE 0x00000020 /* Precision Exception */ |
#define | X86_MXCSR_STATUS_MASK 0x0000003f /* `- All of the above */ |
#define | X86_EXC_DE 0 /* Divide Error. */ |
#define | X86_EXC_DB 1 /* Debug Exception. */ |
#define | X86_EXC_NMI 2 /* NMI. */ |
#define | X86_EXC_BP 3 /* Breakpoint. */ |
#define | X86_EXC_OF 4 /* Overflow. */ |
#define | X86_EXC_BR 5 /* BOUND Range. */ |
#define | X86_EXC_UD 6 /* Invalid Opcode. */ |
#define | X86_EXC_NM 7 /* Device Not Available. */ |
#define | X86_EXC_DF 8 /* Double Fault. */ |
#define | X86_EXC_CSO 9 /* Coprocessor Segment Overrun. */ |
#define | X86_EXC_TS 10 /* Invalid TSS. */ |
#define | X86_EXC_NP 11 /* Segment Not Present. */ |
#define | X86_EXC_SS 12 /* Stack-Segment Fault. */ |
#define | X86_EXC_GP 13 /* General Protection Fault. */ |
#define | X86_EXC_PF 14 /* Page Fault. */ |
#define | X86_EXC_SPV 15 /* PIC Spurious Interrupt Vector. */ |
#define | X86_EXC_MF 16 /* Maths fault (x87 FPU). */ |
#define | X86_EXC_AC 17 /* Alignment Check. */ |
#define | X86_EXC_MC 18 /* Machine Check. */ |
#define | X86_EXC_XM 19 /* SIMD Exception. */ |
#define | X86_EXC_VE 20 /* Virtualisation Exception. */ |
#define | X86_EXC_HAVE_EC |
#define | X86_EXC_FAULTS |
#define | X86_EXC_INTERRUPTS (1 << X86_EXC_NMI) |
#define | X86_EXC_TRAPS ((1 << X86_EXC_BP) | (1 << X86_EXC_OF)) |
#define | X86_EXC_ABORTS ((1 << X86_EXC_DF) | (1 << X86_EXC_MC)) |
#define | X86_NR_RESERVED_VECTORS 32 |
#define | X86_EC_EXT (1U << 0) /* External event. */ |
#define | X86_EC_IDT (1U << 1) /* Descriptor Location. IDT, or LDT/GDT */ |
#define | X86_EC_TI (1U << 2) /* Only if !IDT. LDT or GDT. */ |
#define | X86_EC_TABLE_MASK (3 << 1) |
#define | X86_EC_SEL_SHIFT 3 |
#define | X86_EC_SEL_MASK (~0U << X86_EC_SEL_SHIFT) |
#define | X86_EC_GDT 0 |
#define | X86_EC_LDT X86_EC_TI |
#define | X86_PFEC_PRESENT (1U << 0) |
#define | X86_PFEC_WRITE (1U << 1) |
#define | X86_PFEC_USER (1U << 2) |
#define | X86_PFEC_RSVD (1U << 3) |
#define | X86_PFEC_INSN (1U << 4) |
#define | X86_PFEC_PK (1U << 5) |
#define | X86_PFEC_P X86_PFEC_PRESENT |
#define | X86_PFEC_W X86_PFEC_WRITE |
#define | X86_PFEC_U X86_PFEC_USER |
#define | X86_PFEC_R X86_PFEC_RSVD |
#define | X86_PFEC_I X86_PFEC_INSN |
#define | X86_PFEC_K X86_PFEC_PK |
#define | X86_SEL_TI (1U << 2) /* Table Indicator. */ |
#define | X86_SEL_RPL_MASK 3 /* RPL is the bottom two bits. */ |
#define | X86_SEL_GDT 0 |
#define | X86_SEL_LDT X86_SEL_TI |
#define X86_EFLAGS_CF 0x00000001 /* Carry Flag */ |
Definition at line 7 of file processor.h.
#define X86_EFLAGS_MBS 0x00000002 /* Resvd bit */ |
Definition at line 8 of file processor.h.
#define X86_EFLAGS_PF 0x00000004 /* Parity Flag */ |
Definition at line 9 of file processor.h.
#define X86_EFLAGS_AF 0x00000010 /* Auxillary carry Flag */ |
Definition at line 10 of file processor.h.
#define X86_EFLAGS_ZF 0x00000040 /* Zero Flag */ |
Definition at line 11 of file processor.h.
#define X86_EFLAGS_SF 0x00000080 /* Sign Flag */ |
Definition at line 12 of file processor.h.
#define X86_EFLAGS_TF 0x00000100 /* Trap Flag */ |
Definition at line 13 of file processor.h.
#define X86_EFLAGS_IF 0x00000200 /* Interrupt Flag */ |
Definition at line 14 of file processor.h.
#define X86_EFLAGS_DF 0x00000400 /* Direction Flag */ |
Definition at line 15 of file processor.h.
#define X86_EFLAGS_OF 0x00000800 /* Overflow Flag */ |
Definition at line 16 of file processor.h.
#define X86_EFLAGS_IOPL 0x00003000 /* IOPL mask */ |
Definition at line 17 of file processor.h.
#define X86_EFLAGS_NT 0x00004000 /* Nested Task */ |
Definition at line 18 of file processor.h.
#define X86_EFLAGS_RF 0x00010000 /* Resume Flag */ |
Definition at line 19 of file processor.h.
#define X86_EFLAGS_VM 0x00020000 /* Virtual Mode */ |
Definition at line 20 of file processor.h.
#define X86_EFLAGS_AC 0x00040000 /* Alignment Check */ |
Definition at line 21 of file processor.h.
#define X86_EFLAGS_VIF 0x00080000 /* Virtual Interrupt Flag */ |
Definition at line 22 of file processor.h.
#define X86_EFLAGS_VIP 0x00100000 /* Virtual Interrupt Pending */ |
Definition at line 23 of file processor.h.
#define X86_EFLAGS_ID 0x00200000 /* CPUID detection flag */ |
Definition at line 24 of file processor.h.
#define X86_CR0_PE 0x00000001 /* Enable Protected Mode (RW) */ |
Definition at line 29 of file processor.h.
#define X86_CR0_MP 0x00000002 /* Monitor Coprocessor (RW) */ |
Definition at line 30 of file processor.h.
#define X86_CR0_EM 0x00000004 /* Require FPU Emulation (RO) */ |
Definition at line 31 of file processor.h.
#define X86_CR0_TS 0x00000008 /* Task Switched (RW) */ |
Definition at line 32 of file processor.h.
#define X86_CR0_ET 0x00000010 /* Extension type (RO) */ |
Definition at line 33 of file processor.h.
#define X86_CR0_NE 0x00000020 /* Numeric Error Reporting (RW) */ |
Definition at line 34 of file processor.h.
#define X86_CR0_WP 0x00010000 /* Supervisor Write Protect (RW) */ |
Definition at line 35 of file processor.h.
#define X86_CR0_AM 0x00040000 /* Alignment Checking (RW) */ |
Definition at line 36 of file processor.h.
#define X86_CR0_NW 0x20000000 /* Not Write-Through (RW) */ |
Definition at line 37 of file processor.h.
#define X86_CR0_CD 0x40000000 /* Cache Disable (RW) */ |
Definition at line 38 of file processor.h.
#define X86_CR0_PG 0x80000000 /* Paging (RW) */ |
Definition at line 39 of file processor.h.
#define X86_CR4_VME 0x00000001 /* VM86 extensions */ |
Definition at line 44 of file processor.h.
#define X86_CR4_PVI 0x00000002 /* Virtual interrupts flag */ |
Definition at line 45 of file processor.h.
#define X86_CR4_TSD 0x00000004 /* Disable time stamp at ipl 3 */ |
Definition at line 46 of file processor.h.
#define X86_CR4_DE 0x00000008 /* Debugging extensions */ |
Definition at line 47 of file processor.h.
#define X86_CR4_PSE 0x00000010 /* Page size extensions */ |
Definition at line 48 of file processor.h.
#define X86_CR4_PAE 0x00000020 /* Physical address extensions */ |
Definition at line 49 of file processor.h.
#define X86_CR4_MCE 0x00000040 /* Machine check */ |
Definition at line 50 of file processor.h.
#define X86_CR4_PGE 0x00000080 /* Global pages */ |
Definition at line 51 of file processor.h.
#define X86_CR4_PCE 0x00000100 /* Performance counters at ipl 3 */ |
Definition at line 52 of file processor.h.
#define X86_CR4_OSFXSR 0x00000200 /* Fast FPU save and restore */ |
Definition at line 53 of file processor.h.
#define X86_CR4_OSXMMEXCPT 0x00000400 /* Unmasked SSE exceptions */ |
Definition at line 54 of file processor.h.
#define X86_CR4_UMIP 0x00000800 /* UMIP */ |
Definition at line 55 of file processor.h.
#define X86_CR4_VMXE 0x00002000 /* VMX */ |
Definition at line 56 of file processor.h.
#define X86_CR4_SMXE 0x00004000 /* SMX */ |
Definition at line 57 of file processor.h.
#define X86_CR4_FSGSBASE 0x00010000 /* {rd,wr}{fs,gs}base */ |
Definition at line 58 of file processor.h.
#define X86_CR4_PCIDE 0x00020000 /* PCID */ |
Definition at line 59 of file processor.h.
#define X86_CR4_OSXSAVE 0x00040000 /* XSAVE/XRSTOR */ |
Definition at line 60 of file processor.h.
#define X86_CR4_SMEP 0x00100000 /* SMEP */ |
Definition at line 61 of file processor.h.
#define X86_CR4_SMAP 0x00200000 /* SMAP */ |
Definition at line 62 of file processor.h.
#define _XSTATE_FP 0 |
Definition at line 67 of file processor.h.
#define XSTATE_FP (1ULL << _XSTATE_FP) |
Definition at line 68 of file processor.h.
#define _XSTATE_SSE 1 |
Definition at line 69 of file processor.h.
#define XSTATE_SSE (1ULL << _XSTATE_SSE) |
Definition at line 70 of file processor.h.
#define _XSTATE_YMM 2 |
Definition at line 71 of file processor.h.
#define XSTATE_YMM (1ULL << _XSTATE_YMM) |
Definition at line 72 of file processor.h.
#define _XSTATE_BNDREGS 3 |
Definition at line 73 of file processor.h.
#define XSTATE_BNDREGS (1ULL << _XSTATE_BNDREGS) |
Definition at line 74 of file processor.h.
#define _XSTATE_BNDCSR 4 |
Definition at line 75 of file processor.h.
#define XSTATE_BNDCSR (1ULL << _XSTATE_BNDCSR) |
Definition at line 76 of file processor.h.
#define _XSTATE_OPMASK 5 |
Definition at line 77 of file processor.h.
#define XSTATE_OPMASK (1ULL << _XSTATE_OPMASK) |
Definition at line 78 of file processor.h.
#define _XSTATE_ZMM 6 |
Definition at line 79 of file processor.h.
#define XSTATE_ZMM (1ULL << _XSTATE_ZMM) |
Definition at line 80 of file processor.h.
#define _XSTATE_HI_ZMM 7 |
Definition at line 81 of file processor.h.
#define XSTATE_HI_ZMM (1ULL << _XSTATE_HI_ZMM) |
Definition at line 82 of file processor.h.
#define _XSTATE_PKRU 9 |
Definition at line 83 of file processor.h.
#define XSTATE_PKRU (1ULL << _XSTATE_PKRU) |
Definition at line 84 of file processor.h.
#define _XSTATE_LWP 62 |
Definition at line 85 of file processor.h.
#define XSTATE_LWP (1ULL << _XSTATE_LWP) |
Definition at line 86 of file processor.h.
#define X86_MXCSR_IE 0x00000001 /* Invalid-Operation Exception */ |
Definition at line 91 of file processor.h.
#define X86_MXCSR_DE 0x00000002 /* Denormal-Operation Exception */ |
Definition at line 92 of file processor.h.
#define X86_MXCSR_ZE 0x00000004 /* Zero-divide Exception */ |
Definition at line 93 of file processor.h.
#define X86_MXCSR_OE 0x00000008 /* Overflow Exception */ |
Definition at line 94 of file processor.h.
#define X86_MXCSR_UE 0x00000010 /* Underflow Exception */ |
Definition at line 95 of file processor.h.
#define X86_MXCSR_PE 0x00000020 /* Precision Exception */ |
Definition at line 96 of file processor.h.
#define X86_MXCSR_STATUS_MASK 0x0000003f /* `- All of the above */ |
Definition at line 97 of file processor.h.
#define X86_EXC_DE 0 /* Divide Error. */ |
Definition at line 102 of file processor.h.
#define X86_EXC_DB 1 /* Debug Exception. */ |
Definition at line 103 of file processor.h.
#define X86_EXC_NMI 2 /* NMI. */ |
Definition at line 104 of file processor.h.
#define X86_EXC_BP 3 /* Breakpoint. */ |
Definition at line 105 of file processor.h.
#define X86_EXC_OF 4 /* Overflow. */ |
Definition at line 106 of file processor.h.
#define X86_EXC_BR 5 /* BOUND Range. */ |
Definition at line 107 of file processor.h.
#define X86_EXC_UD 6 /* Invalid Opcode. */ |
Definition at line 108 of file processor.h.
#define X86_EXC_NM 7 /* Device Not Available. */ |
Definition at line 109 of file processor.h.
#define X86_EXC_DF 8 /* Double Fault. */ |
Definition at line 110 of file processor.h.
#define X86_EXC_CSO 9 /* Coprocessor Segment Overrun. */ |
Definition at line 111 of file processor.h.
#define X86_EXC_TS 10 /* Invalid TSS. */ |
Definition at line 112 of file processor.h.
#define X86_EXC_NP 11 /* Segment Not Present. */ |
Definition at line 113 of file processor.h.
#define X86_EXC_SS 12 /* Stack-Segment Fault. */ |
Definition at line 114 of file processor.h.
#define X86_EXC_GP 13 /* General Protection Fault. */ |
Definition at line 115 of file processor.h.
#define X86_EXC_PF 14 /* Page Fault. */ |
Definition at line 116 of file processor.h.
#define X86_EXC_SPV 15 /* PIC Spurious Interrupt Vector. */ |
Definition at line 117 of file processor.h.
#define X86_EXC_MF 16 /* Maths fault (x87 FPU). */ |
Definition at line 118 of file processor.h.
#define X86_EXC_AC 17 /* Alignment Check. */ |
Definition at line 119 of file processor.h.
#define X86_EXC_MC 18 /* Machine Check. */ |
Definition at line 120 of file processor.h.
#define X86_EXC_XM 19 /* SIMD Exception. */ |
Definition at line 121 of file processor.h.
#define X86_EXC_VE 20 /* Virtualisation Exception. */ |
Definition at line 122 of file processor.h.
#define X86_EXC_HAVE_EC |
Definition at line 125 of file processor.h.
#define X86_EXC_FAULTS |
Definition at line 131 of file processor.h.
#define X86_EXC_INTERRUPTS (1 << X86_EXC_NMI) |
Definition at line 140 of file processor.h.
#define X86_EXC_TRAPS ((1 << X86_EXC_BP) | (1 << X86_EXC_OF)) |
Definition at line 143 of file processor.h.
#define X86_EXC_ABORTS ((1 << X86_EXC_DF) | (1 << X86_EXC_MC)) |
Definition at line 146 of file processor.h.
#define X86_NR_RESERVED_VECTORS 32 |
Definition at line 149 of file processor.h.
#define X86_EC_EXT (1U << 0) /* External event. */ |
Definition at line 155 of file processor.h.
#define X86_EC_IDT (1U << 1) /* Descriptor Location. IDT, or LDT/GDT */ |
Definition at line 156 of file processor.h.
#define X86_EC_TI (1U << 2) /* Only if !IDT. LDT or GDT. */ |
Definition at line 157 of file processor.h.
#define X86_EC_TABLE_MASK (3 << 1) |
Definition at line 160 of file processor.h.
#define X86_EC_SEL_SHIFT 3 |
Definition at line 161 of file processor.h.
#define X86_EC_SEL_MASK (~0U << X86_EC_SEL_SHIFT) |
Definition at line 162 of file processor.h.
#define X86_EC_GDT 0 |
Definition at line 163 of file processor.h.
#define X86_EC_LDT X86_EC_TI |
Definition at line 164 of file processor.h.
#define X86_PFEC_PRESENT (1U << 0) |
Definition at line 167 of file processor.h.
#define X86_PFEC_WRITE (1U << 1) |
Definition at line 168 of file processor.h.
#define X86_PFEC_USER (1U << 2) |
Definition at line 169 of file processor.h.
#define X86_PFEC_RSVD (1U << 3) |
Definition at line 170 of file processor.h.
#define X86_PFEC_INSN (1U << 4) |
Definition at line 171 of file processor.h.
#define X86_PFEC_PK (1U << 5) |
Definition at line 172 of file processor.h.
#define X86_PFEC_P X86_PFEC_PRESENT |
Definition at line 175 of file processor.h.
#define X86_PFEC_W X86_PFEC_WRITE |
Definition at line 176 of file processor.h.
#define X86_PFEC_U X86_PFEC_USER |
Definition at line 177 of file processor.h.
#define X86_PFEC_R X86_PFEC_RSVD |
Definition at line 178 of file processor.h.
#define X86_PFEC_I X86_PFEC_INSN |
Definition at line 179 of file processor.h.
#define X86_PFEC_K X86_PFEC_PK |
Definition at line 180 of file processor.h.
#define X86_SEL_TI (1U << 2) /* Table Indicator. */ |
Definition at line 186 of file processor.h.
#define X86_SEL_RPL_MASK 3 /* RPL is the bottom two bits. */ |
Definition at line 189 of file processor.h.
#define X86_SEL_GDT 0 |
Definition at line 190 of file processor.h.
#define X86_SEL_LDT X86_SEL_TI |
Definition at line 191 of file processor.h.