x86 Debug Register Infrastructure More...

#include <xtf/macro_magic.h>

Include dependency graph for x86-dbg-reg.h:

This graph shows which files directly or indirectly include this file:

Macros
#define	X86_DR6_B0 (1u << 0) /* Breakpoint 0 triggered */

#define	X86_DR6_B1 (1u << 1) /* Breakpoint 1 triggered */

#define	X86_DR6_B2 (1u << 2) /* Breakpoint 2 triggered */

#define	X86_DR6_B3 (1u << 3) /* Breakpoint 3 triggered */

#define	X86_DR6_BD (1u << 13) /* Debug register accessed */

#define	X86_DR6_BS (1u << 14) /* Single step */

#define	X86_DR6_BT (1u << 15) /* Task switch */

#define	X86_DR6_RTM (1u << 16) /* #DB/#BP in RTM region */

#define	X86_DR6_DEFAULT 0xffff0ff0

#define	X86_DR7_LE (1u << 8) /* Local Exact Breakpoints */

#define	X86_DR7_GE (1u << 9) /* Global Exact Breakpoints */

#define	X86_DR7_RTM (1u << 11) /* Debugging in RTM regions */

#define	X86_DR7_GD (1u << 13) /* General Detect */

#define	X86_DR7_DEFAULT 0x00000400

#define	X86_DR7_0_L (1u << 0)

#define	X86_DR7_1_L (1u << 2)

#define	X86_DR7_2_L (1u << 4)

#define	X86_DR7_3_L (1u << 6)

#define	X86_DR7_0_G (1u << 1)

#define	X86_DR7_1_G (1u << 3)

#define	X86_DR7_2_G (1u << 5)

#define	X86_DR7_3_G (1u << 7)

#define	X86_DR7_0_X (0u << 16)

#define	X86_DR7_0_W (1u << 16)

#define	X86_DR7_0_IO (2u << 16)

#define	X86_DR7_0_RW (3u << 16)

#define	X86_DR7_0_8 (0u << 18)

#define	X86_DR7_0_16 (1u << 18)

#define	X86_DR7_0_64 (2u << 18)

#define	X86_DR7_0_32 (3u << 18)

#define	X86_DR7_1_X (0u << 20)

#define	X86_DR7_1_W (1u << 20)

#define	X86_DR7_1_IO (2u << 20)

#define	X86_DR7_1_RW (3u << 20)

#define	X86_DR7_1_8 (0u << 22)

#define	X86_DR7_1_16 (1u << 22)

#define	X86_DR7_1_64 (2u << 22)

#define	X86_DR7_1_32 (3u << 22)

#define	X86_DR7_2_X (0u << 24)

#define	X86_DR7_2_W (1u << 24)

#define	X86_DR7_2_IO (2u << 24)

#define	X86_DR7_2_RW (3u << 24)

#define	X86_DR7_2_8 (0u << 26)

#define	X86_DR7_2_16 (1u << 26)

#define	X86_DR7_2_64 (2u << 26)

#define	X86_DR7_2_32 (3u << 26)

#define	X86_DR7_3_X (0u << 28)

#define	X86_DR7_3_W (1u << 28)

#define	X86_DR7_3_IO (2u << 28)

#define	X86_DR7_3_RW (3u << 28)

#define	X86_DR7_3_8 (0u << 30)

#define	X86_DR7_3_16 (1u << 30)

#define	X86_DR7_3_64 (2u << 30)

#define	X86_DR7_3_32 (3u << 30)

#define	DR7_SYM(bp, ...) TOK_OR(X86_DR7_ ## bp ## _, ##__VA_ARGS__)
	Create a partial %dr7 setting for a particular breakpoint based on mnemonics. More...

Functions
static unsigned long	read_dr0 (void)

static void	write_dr0 (unsigned long linear)

static unsigned long	read_dr1 (void)

static void	write_dr1 (unsigned long linear)

static unsigned long	read_dr2 (void)

static void	write_dr2 (unsigned long linear)

static unsigned long	read_dr3 (void)

static void	write_dr3 (unsigned long linear)

static unsigned long	read_dr6 (void)

static void	write_dr6 (unsigned long val)

static unsigned long	read_dr7 (void)

static void	write_dr7 (unsigned long val)

Detailed Description

x86 Debug Register Infrastructure

Definition in file x86-dbg-reg.h.

Macro Definition Documentation

◆ X86_DR6_B0

#define X86_DR6_B0 (1u << 0) /* Breakpoint 0 triggered */

Definition at line 15 of file x86-dbg-reg.h.

◆ X86_DR6_B1

#define X86_DR6_B1 (1u << 1) /* Breakpoint 1 triggered */

Definition at line 16 of file x86-dbg-reg.h.

◆ X86_DR6_B2

#define X86_DR6_B2 (1u << 2) /* Breakpoint 2 triggered */

Definition at line 17 of file x86-dbg-reg.h.

◆ X86_DR6_B3

#define X86_DR6_B3 (1u << 3) /* Breakpoint 3 triggered */

Definition at line 18 of file x86-dbg-reg.h.

◆ X86_DR6_BD

#define X86_DR6_BD (1u << 13) /* Debug register accessed */

Definition at line 19 of file x86-dbg-reg.h.

◆ X86_DR6_BS

#define X86_DR6_BS (1u << 14) /* Single step */

Definition at line 20 of file x86-dbg-reg.h.

◆ X86_DR6_BT

#define X86_DR6_BT (1u << 15) /* Task switch */

Definition at line 21 of file x86-dbg-reg.h.

◆ X86_DR6_RTM

#define X86_DR6_RTM (1u << 16) /* #DB/#BP in RTM region */

Definition at line 22 of file x86-dbg-reg.h.

◆ X86_DR6_DEFAULT

#define X86_DR6_DEFAULT 0xffff0ff0

Definition at line 24 of file x86-dbg-reg.h.

◆ X86_DR7_LE

#define X86_DR7_LE (1u << 8) /* Local Exact Breakpoints */

Definition at line 29 of file x86-dbg-reg.h.

◆ X86_DR7_GE

#define X86_DR7_GE (1u << 9) /* Global Exact Breakpoints */

Definition at line 30 of file x86-dbg-reg.h.

◆ X86_DR7_RTM

#define X86_DR7_RTM (1u << 11) /* Debugging in RTM regions */

Definition at line 31 of file x86-dbg-reg.h.

◆ X86_DR7_GD

#define X86_DR7_GD (1u << 13) /* General Detect */

Definition at line 32 of file x86-dbg-reg.h.

◆ X86_DR7_DEFAULT

#define X86_DR7_DEFAULT 0x00000400

Definition at line 34 of file x86-dbg-reg.h.

◆ X86_DR7_0_L

#define X86_DR7_0_L (1u << 0)

Definition at line 39 of file x86-dbg-reg.h.

◆ X86_DR7_1_L

#define X86_DR7_1_L (1u << 2)

Definition at line 40 of file x86-dbg-reg.h.

◆ X86_DR7_2_L

#define X86_DR7_2_L (1u << 4)

Definition at line 41 of file x86-dbg-reg.h.

◆ X86_DR7_3_L

#define X86_DR7_3_L (1u << 6)

Definition at line 42 of file x86-dbg-reg.h.

◆ X86_DR7_0_G

#define X86_DR7_0_G (1u << 1)

Definition at line 44 of file x86-dbg-reg.h.

◆ X86_DR7_1_G

#define X86_DR7_1_G (1u << 3)

Definition at line 45 of file x86-dbg-reg.h.

◆ X86_DR7_2_G

#define X86_DR7_2_G (1u << 5)

Definition at line 46 of file x86-dbg-reg.h.

◆ X86_DR7_3_G

#define X86_DR7_3_G (1u << 7)

Definition at line 47 of file x86-dbg-reg.h.

◆ X86_DR7_0_X

#define X86_DR7_0_X (0u << 16)

Definition at line 49 of file x86-dbg-reg.h.

◆ X86_DR7_0_W

#define X86_DR7_0_W (1u << 16)

Definition at line 50 of file x86-dbg-reg.h.

◆ X86_DR7_0_IO

#define X86_DR7_0_IO (2u << 16)

Definition at line 51 of file x86-dbg-reg.h.

◆ X86_DR7_0_RW

#define X86_DR7_0_RW (3u << 16)

Definition at line 52 of file x86-dbg-reg.h.

◆ X86_DR7_0_8

#define X86_DR7_0_8 (0u << 18)

Definition at line 54 of file x86-dbg-reg.h.

◆ X86_DR7_0_16

#define X86_DR7_0_16 (1u << 18)

Definition at line 55 of file x86-dbg-reg.h.

◆ X86_DR7_0_64

#define X86_DR7_0_64 (2u << 18)

Definition at line 56 of file x86-dbg-reg.h.

◆ X86_DR7_0_32

#define X86_DR7_0_32 (3u << 18)

Definition at line 57 of file x86-dbg-reg.h.

◆ X86_DR7_1_X

#define X86_DR7_1_X (0u << 20)

Definition at line 59 of file x86-dbg-reg.h.

◆ X86_DR7_1_W

#define X86_DR7_1_W (1u << 20)

Definition at line 60 of file x86-dbg-reg.h.

◆ X86_DR7_1_IO

#define X86_DR7_1_IO (2u << 20)

Definition at line 61 of file x86-dbg-reg.h.

◆ X86_DR7_1_RW

#define X86_DR7_1_RW (3u << 20)

Definition at line 62 of file x86-dbg-reg.h.

◆ X86_DR7_1_8

#define X86_DR7_1_8 (0u << 22)

Definition at line 64 of file x86-dbg-reg.h.

◆ X86_DR7_1_16

#define X86_DR7_1_16 (1u << 22)

Definition at line 65 of file x86-dbg-reg.h.

◆ X86_DR7_1_64

#define X86_DR7_1_64 (2u << 22)

Definition at line 66 of file x86-dbg-reg.h.

◆ X86_DR7_1_32

#define X86_DR7_1_32 (3u << 22)

Definition at line 67 of file x86-dbg-reg.h.

◆ X86_DR7_2_X

#define X86_DR7_2_X (0u << 24)

Definition at line 69 of file x86-dbg-reg.h.

◆ X86_DR7_2_W

#define X86_DR7_2_W (1u << 24)

Definition at line 70 of file x86-dbg-reg.h.

◆ X86_DR7_2_IO

#define X86_DR7_2_IO (2u << 24)

Definition at line 71 of file x86-dbg-reg.h.

◆ X86_DR7_2_RW

#define X86_DR7_2_RW (3u << 24)

Definition at line 72 of file x86-dbg-reg.h.

◆ X86_DR7_2_8

#define X86_DR7_2_8 (0u << 26)

Definition at line 74 of file x86-dbg-reg.h.

◆ X86_DR7_2_16

#define X86_DR7_2_16 (1u << 26)

Definition at line 75 of file x86-dbg-reg.h.

◆ X86_DR7_2_64

#define X86_DR7_2_64 (2u << 26)

Definition at line 76 of file x86-dbg-reg.h.

◆ X86_DR7_2_32

#define X86_DR7_2_32 (3u << 26)

Definition at line 77 of file x86-dbg-reg.h.

◆ X86_DR7_3_X

#define X86_DR7_3_X (0u << 28)

Definition at line 79 of file x86-dbg-reg.h.

◆ X86_DR7_3_W

#define X86_DR7_3_W (1u << 28)

Definition at line 80 of file x86-dbg-reg.h.

◆ X86_DR7_3_IO

#define X86_DR7_3_IO (2u << 28)

Definition at line 81 of file x86-dbg-reg.h.

◆ X86_DR7_3_RW

#define X86_DR7_3_RW (3u << 28)

Definition at line 82 of file x86-dbg-reg.h.

◆ X86_DR7_3_8

#define X86_DR7_3_8 (0u << 30)

Definition at line 84 of file x86-dbg-reg.h.

◆ X86_DR7_3_16

#define X86_DR7_3_16 (1u << 30)

Definition at line 85 of file x86-dbg-reg.h.

◆ X86_DR7_3_64

#define X86_DR7_3_64 (2u << 30)

Definition at line 86 of file x86-dbg-reg.h.

◆ X86_DR7_3_32

#define X86_DR7_3_32 (3u << 30)

Definition at line 87 of file x86-dbg-reg.h.

◆ DR7_SYM

#define DR7_SYM	(	bp,
		...
	)	TOK_OR(X86_DR7_ ## bp ## _, ##__VA_ARGS__)

Create a partial %dr7 setting for a particular breakpoint based on mnemonics.

Parameters

bp	Breakpoint. Must be in the range 0 ... 3
...	Partial X86_DR7_ tokens

Example usage:

DR7_SYM(1, G, RW, 8) => Breakpoint 1, global read/write 8-bit
DR7_SYM(3, L, X) => Breakpoint 3, local instruction

Definition at line 100 of file x86-dbg-reg.h.

Function Documentation

◆ read_dr0()

static unsigned long read_dr0 ( void )

inlinestatic

Definition at line 102 of file x86-dbg-reg.h.

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◆ write_dr0()

static void write_dr0 ( unsigned long linear )

inlinestatic

Definition at line 111 of file x86-dbg-reg.h.

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◆ read_dr1()

static unsigned long read_dr1 ( void )

inlinestatic

Definition at line 116 of file x86-dbg-reg.h.

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◆ write_dr1()

static void write_dr1 ( unsigned long linear )

inlinestatic

Definition at line 125 of file x86-dbg-reg.h.

◆ read_dr2()

static unsigned long read_dr2 ( void )

inlinestatic

Definition at line 130 of file x86-dbg-reg.h.

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◆ write_dr2()

static void write_dr2 ( unsigned long linear )

inlinestatic

Definition at line 139 of file x86-dbg-reg.h.

◆ read_dr3()

static unsigned long read_dr3 ( void )

inlinestatic

Definition at line 144 of file x86-dbg-reg.h.

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◆ write_dr3()

static void write_dr3 ( unsigned long linear )

inlinestatic

Definition at line 153 of file x86-dbg-reg.h.

◆ read_dr6()

static unsigned long read_dr6 ( void )

inlinestatic

Definition at line 158 of file x86-dbg-reg.h.

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◆ write_dr6()

static void write_dr6 ( unsigned long val )

inlinestatic

Definition at line 167 of file x86-dbg-reg.h.

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◆ read_dr7()

static unsigned long read_dr7 ( void )

inlinestatic

Definition at line 172 of file x86-dbg-reg.h.

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◆ write_dr7()

static void write_dr7 ( unsigned long val )

inlinestatic

Definition at line 181 of file x86-dbg-reg.h.

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Macros

Functions

Detailed Description

Macro Definition Documentation

◆ X86_DR6_B0

◆ X86_DR6_B1

◆ X86_DR6_B2

◆ X86_DR6_B3

◆ X86_DR6_BD

◆ X86_DR6_BS

◆ X86_DR6_BT

◆ X86_DR6_RTM

◆ X86_DR6_DEFAULT

◆ X86_DR7_LE

◆ X86_DR7_GE

◆ X86_DR7_RTM

◆ X86_DR7_GD

◆ X86_DR7_DEFAULT

◆ X86_DR7_0_L

◆ X86_DR7_1_L

◆ X86_DR7_2_L

◆ X86_DR7_3_L

◆ X86_DR7_0_G

◆ X86_DR7_1_G

◆ X86_DR7_2_G

◆ X86_DR7_3_G

◆ X86_DR7_0_X

◆ X86_DR7_0_W

◆ X86_DR7_0_IO

◆ X86_DR7_0_RW

◆ X86_DR7_0_8

◆ X86_DR7_0_16

◆ X86_DR7_0_64

◆ X86_DR7_0_32

◆ X86_DR7_1_X

◆ X86_DR7_1_W

◆ X86_DR7_1_IO

◆ X86_DR7_1_RW

◆ X86_DR7_1_8

◆ X86_DR7_1_16

◆ X86_DR7_1_64

◆ X86_DR7_1_32

◆ X86_DR7_2_X

◆ X86_DR7_2_W

◆ X86_DR7_2_IO

◆ X86_DR7_2_RW

◆ X86_DR7_2_8

◆ X86_DR7_2_16

◆ X86_DR7_2_64

◆ X86_DR7_2_32

◆ X86_DR7_3_X

◆ X86_DR7_3_W

◆ X86_DR7_3_IO

◆ X86_DR7_3_RW

◆ X86_DR7_3_8

◆ X86_DR7_3_16

◆ X86_DR7_3_64

◆ X86_DR7_3_32

◆ DR7_SYM

Function Documentation

◆ read_dr0()

◆ write_dr0()

◆ read_dr1()

◆ write_dr1()

◆ read_dr2()

◆ write_dr2()

◆ read_dr3()

◆ write_dr3()

◆ read_dr6()

◆ write_dr6()

◆ read_dr7()

◆ write_dr7()